A3980(2011) View Datasheet(PDF) - Allegro MicroSystems

Part Name

Description

Manufacturer

A3980
(Rev.:2011)

Automotive DMOS Microstepping Driver with Translator

Allegro MicroSystems 

A3980

Automotive DMOS Microstepping Driver

with Translator

The total dissipation for each of the four decay modes is the

average power for the current ramp and the current decay

portions of the PWM cycle.

Non-synchronous slow decay mode:

× × PTOT = (0.2 PD ) + (0.8 PNS )

For slow decay, the current is rising for approximately 20%

of the cycle and decaying for approximately 80%. For fast

decay, the ratio is approximately 50% for each. Note that

these are approximate figures, and they vary slightly depend-

ing on the motor characteristics and the use of synchronous

rectification.

The power dissipation, PTOT, in each decay mode can be

calculated as shown in the following formulas.

Synchronous slow decay mode:

× × PTOT = (0.2 PD ) + (0.8 PSS )

× × × PTOT = [0.2 I2 (RDSONH + RDSONL)] + [0.8 I2 (2 RDSONL)]

Allowable Package Power Dissipation

5

4

3

1RθJA = 28ºC/W

2

2RθJA = 38ºC/W

1

0

25

50

75

100

125

150

Ambient Temperature (°C)

1RθJA at 28ºC/W measured on a JEDEC-standard

“High-K” 4-layer PCB.

2RθJA at 38ºC/W measured on a typical 2-sided PCB

with 3 in.2 (1935 mm2) copper ground area.

× × × PTOT=[0.2 I2(RDSONH+RDSONL)]+{0.8 [I2RDSONL+(I VF)]}

Synchronous fast decay mode:

× × PTOT = (0.5 PD ) + (0.5 PSF )

PTOT = I2 (RDSONH + RDSONL)

Non-synchronous fast decay mode:

× × PTOT = (0.5 PD ) + (0.5 PNF )

× × × PTOT = [0.5 I2 (RDSONH + RDSONL)] + (0.5 I2 RDSONL)

An approximation of the total dissipation can be calculated

by summing the total power dissipated in both full-bridges

× and adding the control circuit power due to VBB IBB and

× VDD IDD. The total power at the required ambient tempera-

ture can then be compared to the allowable power dissipation,

shown in the Allowable Package Power Dissipation chart.

For critical applications, where the first order power estimate

is close to the allowable dissipation, the power calculation

should take several other parameters into account including:

motor parameters, dead time, and switching losses in the

controller.

Layout. The printed circuit board should use a heavy

ground plane. For optimum electrical and thermal perfor-

mance, the A3980 should be soldered directly onto the board.

The load supply terminal, VBB, should be decoupled with

an electrolytic capacitor (> 47 μF is recommended), placed

as close to the A3980 as possible. To avoid problems due to

capacitive coupling of the high dv/dt switching transients,

route the full-bridge output traces away from the sensitive

logic input traces. Always drive the logic inputs with a low

source impedance to increase noise immunity.

Grounding. A star ground system located close to the

A3980 is recommended. On the 28-lead TSSOP package, the

analog ground (lead 7) and the power ground (lead 21) must

be connected together externally. The copper ground plane

located under the exposed thermal pad is typically used as

the star ground point.

Allegro MicroSystems, Inc.

15

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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