A10V10B-1PG84C View Datasheet(PDF) - Actel Corporation
Part Name
Description
Manufacturer
A10V10B-1PG84C Datasheet PDF : 24 Pages
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Equivalent Capacitance
The power dissipated by a CMOS circuit can be expressed by
the Equation 1.
Power (uW) = CEQ * VCC2 * F
(1)
Where:
CEQ is the equivalent capacitance expressed in pF.
VCC is the power supply in volts.
F is the switching frequency in MHz.
Equivalent capacitance is calculated by measuring ICCactive
at a specified frequency and voltage for each circuit
component of interest. Measurements have been made over a
range of frequencies at a fixed value of VCC. Equivalent
capacitance is frequency independent so that the results may
be used over a wide range of operating conditions. Equivalent
capacitance values are shown below.
CEQ Values for Actel FPGAs
Modules (CEQM)
Input Buffers (CEQI)
Output Buffers (CEQO)
Routed Array Clock Buffer
Loads (CEQCR)
A10V10B
A10V20B
3.2
10.9
11.6
A1010B
A1020B
3.7
22.1
31.2
4.1
4.6
To calculate the active power dissipated from the complete
design, the switching frequency of each part of the logic must
be known. Equation 2 shows a piece-wise linear summation
over all components.
Power = VCC2 * [(m * CEQM * fm)modules +
(n * CEQI* fn)inputs + (p * (CEQO+ CL) * fp)outputs +
0.5 * (q1 * CEQCR * fq1)routed_Clk1 +
(r1 * fq1)routed_Clk1]
(2)
Where:
m
= Number of logic modules switching at fm
n
= Number of input buffers switching at fn
p
= Number of output buffers switching at fp
q1
= Number of clock loads on the first routed array
clock (All families)
r1
= Fixed capacitance due to first routed array
clock (All families)
CEQM
CEQI
CEQO
CEQCR
CL
fm
fn
fp
fq1
= Equivalent capacitance of logic modules in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of routed array clock in
pF
= Output lead capacitance in pF
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
= Average output buffer switching rate in MHz
= Average first routed array clock rate in MHz (All
families)
Fixed Capacitance Values for Actel FPGAs
(pF)
Device Type
r1
routed_Clk1
A1010B
41.4
A1020B
68.6
A10V10B
40
A10V20B
65
Determining Average Switching Frequency
To determine the switching frequency for a design, you must
have a detailed understanding of the data input values to the
circuit. The following guidelines are meant to represent
worst-case scenarios so that they can be generally used to
predict the upper limits of power dissipation. These
guidelines are as follows:
Logic Modules (m)
90% of modules
Inputs switching (n)
#inputs/4
Outputs switching (p)
#outputs/4
First routed array clock loads (q1)
40% of modules
Load capacitance (CL)
35 pF
Average logic module switching rate (fm) F/10
Average input switching rate (fn)
F/5
Average output switching rate (fp)
F/10
Average first routed array clock rate F
(fq1)
1-290
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