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74VHCT574AN Octal D-Type Flip-Flop with 3-STATE Outputs Fairchild
Fairchild Semiconductor Fairchild
74VHCT574AN Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Noise Characteristics
Symbol
Parameter
VCC
(V)
VOLP
Quiet Output Maximum Dynamic VOL
5.0
(Note 7)
VOLV
Quiet Output Minimum Dynamic VOL
5.0
(Note 7)
VIHD
Minimum HIGH Level Dynamic Input Voltage
5.0
(Note 7)
VILD
Maximum LOW Level Dynamic Input Voltage
5.0
(Note 7)
Note 7: Parameter guaranteed by design.
TA 25qC
Typ
Limits
1.2
1.6
1.2
1.6
2.0
0.8
Units
Conditions
V
CL 50 pF
V
CL 50 pF
V
CL 50 pF
V
CL 50 pF
AC Electrical Characteristics
Symbol
Parameter
VCC
TA 25qC
TA 40qC to 85qC
Units
(V)
Min
Typ
Max
Min
Max
Conditions
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
tOSLH
tOSHL
fMAX
CIN
Propagation Delay
Time
3-STATE Output
Enable Time
3-STATE Output
Disable Time
Output to
Output Skew
Maximum Clock
Frequency
Input
Capacitance
5.0 r 0.5
5.0 r 0.5
5.0 r 0.5
5.0 r 0.5
90
5.0 r 0.5
85
4.1
9.4
1.0
10.5
ns
5.6
10.4
1.0
11.5
CL 15 pF
CL 50 pF
6.5
10.2
1.0
11.5
ns RL 1 k: CL 15 pF
7.3
11.2
1.0
12.5
CL 50 pF
7.0
11.2
1.0
12.0
ns RL 1 k: CL 50 pF
(Note 8)
1.0
1.0
ns
140
80
130
75
4
10
MHz
CL 15 pF
CL 50 pF
10
pF VCC Open
COUT
Output
9
pF VCC 5.0V
Capacitance
CPD
Power Dissipation
25
Capacitance
pF (Note 9)
Note 8: Parameter guaranteed by design. tOSLH |tPLH max  tPLH min|; tOSHL |tPHL max  tPHL min|
Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN  ICC/8 (per F/F). The total CPD when n pcs. of the Octal D Flip-Flop operates
can be calculated by the equation: CPD (total) 20  12n.
AC Operating Requirements
Symbol
Parameter
tW(H)
tW(L)
tS
tH
Minimum Pulse Width (CP)
Minimum Set-Up Time
Minimum Hold Time
VCC
TA 25qC
(V)
Min
Typ
Max
5.0 r 0.5
6.5
5.0 r 0.5
2.5
5.0 r 0.5
2.5
TA 40qC to 85qC
Min
Max
8.5
2.5
2.5
Units
ns
ns
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