74VHC374 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

74VHC374

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

STMicroelectronics 

®

74VHC374

OCTAL D-TYPE FLIP FLOP

WITH 3 STATE OUTPUT NON INVERTING

s HIGH SPEED:

s fMAX = 270 MHz (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA = 25 oC

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 374

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE VOLP = 0.9V (Max.)

DESCRIPTION

The 74VHC374 is an advanced high-speed

CMOS OCTAL D-TYPE FLIP FLOP with 3

STATE OUTPUT NON INVERTING fabricated

with sub-micron silicon gate and double-layer

metal wiring C2MOS technology.

This 8 bit D-Type flip-flop is controlled by a clock

input (CK) and an output enable input (OE).

On the positive transition of the clock, the Q

outputs will be set to the logic state that were

M

(Micro Package)

T

(TSSOP Package)

ORDER CODES :

74VHC374M

74VHC374T

setup at the D inputs.

While the (OE) input is low, the 8 outputs will be

in a normal logic state (high or low logic level)

and while high level the outputs will be in a high

impedance state.

The output control does not affect the internal

operation of flip flops; that is, the old data can be

retained or the new data can be entered even

while the outputs are off.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 1999

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