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74V1G03C Просмотр технического описания (PDF) - STMicroelectronics

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74V1G03C SINGLE 2-INPUT OPEN DRAIN NAND GATE ST-Microelectronics
STMicroelectronics ST-Microelectronics
74V1G03C Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
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74V1G03
SINGLE 2-INPUT OPEN DRAIN NAND GATE
s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
PRELIMINARY DATA
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1G03S
74V1G03C
DESCRIPTION
The 74V1G03 is an advanced high-speed CMOS
SINGLE 2-INPUT OPEN DRAIN NAND GATE
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
This device can, with an external pull-up resistor,
be used in wired AND configuration. This device
can also be used as a led driver in any other
application requiring a current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
September 1999
1/7
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