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74LVX157 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
74LVX157 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
74LVX157
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS
s HIGH SPEED :
tPD = 5.1 ns (TYP.) at VCC = 3.3V
s 5V TOLERANT INPUTS
s INPUT VOLTAGE LEVEL :
VIL=0.8V, VIH=2V at VCC=3V
s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
s LOW NOISE:
VOLP = 0.3V (TYP.) at VCC = 3.3V
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 157
s IMPROVED LATCH-UP IMMUNITY
s POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX157 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
It consists of four 2-input digital multiplexers with
common select and strobe inputs. When STROBE
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LVX157M
T&R
74LVX157MTR
74LVX157TTR
input is held high, selection of data is inhibited and
all the outputs become low. The SELECT
decoding determines whether the A or B inputs
get routed to their corresponding Y outputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/9
 

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