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74LVX161284AMTX View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74LVX161284AMTX
Fairchild
Fairchild Semiconductor Fairchild
74LVX161284AMTX Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
AC Electrical Characteristics
TA 40qC to  85qC
Symbol
Parameter
VCC 3.0V3.6V
VCCCable 4.5V5.5V
Units
Min
Max
tPHL
A1A8 to B1B8
1.0
8.5
ns
tPLH
A1A8 to B1B8
1.0
8.5
ns
tPHL
B1B8 to A1A8
1.0
14.0
ns
tPLH
B1B8 to A1A8
1.0
14.0
ns
tPHL
A9A13 to Y9Y13
1.0
8.5
ns
tPLH
A9A13 to Y9Y13
1.0
8.5
ns
tPHL
C14C17 to A14A17
1.0
10.0
ns
tPLH
C14C17 to A14A17
1.0
10.0
ns
tSKEW
LH-LH or HL-HL
2.0
ns
tPHL
PLHIN to PLH
1.0
8.5
ns
tPLH
PLHIN to PLH
1.0
8.5
ns
tPHL
HLHIN to HLH
1.0
10.0
ns
tPLH
HLHIN to HLH
1.0
12.0
ns
tPHZ
Output Disable Time
tPLZ
DIR to A1A8
1.0
10.0
ns
1.0
10.0
tPZH
Output Enable Time
tPZL
DIR to A1A8
1.0
10.0
ns
1.0
10.0
tPHZ
Output Disable Time
tPLZ
DIR to B1B8
1.0
13.0
ns
1.0
10.0
tpEN
Output Enable Time
HD to B1B8, Y9Y13
1.0
8.0
ns
tpDIS
Output Disable Time
HD to B1B8, Y9Y13
1.0
12.0
ns
Note 8: tSKEW is measured for common edge output transitions and compares the measured propagation delay for a given path type:
(i) A1A8 to B1B8, A9A13 to Y9Y13
(ii) B1B8 to A1A8
(iii) C14C17 to A14A17
Figure
Number
Figure 1
Figure 2
Figure 3
Figure 3
Figure 1
Figure 2
Figure 3
Figure 3
(Note 8)
Figure 1
Figure 2
Figure 3
Figure 3
Figure 4
Figure 5
Figure 6
Figure 2
Figure 2
Capacitance
Symbol
Parameter
Typ Units
Conditions
CIN
Input Capacitance
3
pF
VCC 0.0V (HD, DIR, A9A13, C14C17, PLHIN and HLHIN)
CI/O (Note 9) I/O Pin Capacitance
5
pF VCC 3.3V
Note 9: CI/O is measured at frequency 1 MHz, per MIL-STD-883B, Method 3012
5
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