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74LVX14M(1999) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74LVX14M
(Rev.:1999)
Fairchild
Fairchild Semiconductor Fairchild
74LVX14M Datasheet PDF : 6 Pages
1 2 3 4 5 6
March 1993
Revised December 1999
74LVX14
Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
The LVX14 contains six inverter gates each with a Schmitt
trigger input. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free out-
put signals. In addition, they have a greater noise margin
than conventional inverters.
The LVX14 has hysteresis between the positive-going and
negative-going input thresholds (typically 1.0V) which is
determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
Features
s Input voltage level translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX14M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74LVX14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX14MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
In
On
Description
Inputs
Outputs
Truth Table
Input
A
L
H
Output
O
H
L
© 1999 Fairchild Semiconductor Corporation DS011603
www.fairchildsemi.com
 

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