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74LVT374MTC View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74LVT374MTC Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Connection Diagram
Logic Symbols
IEEE/IEC
Pin Description
Pin Names
D0–D7
CP
OE
O0–O7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Functional Description
The LVT374 and LVTH374 consist of eight edge-
triggered flip-flops with individual D-type inputs and
3-STATE true outputs. The buffered clock and buffered
Output Enable are common to all flip-flops. The eight flip-
flops will store the state of their individual D inputs that
meet the setup and hold time requirements on the LOW-
to-HIGH Clock (CP) transition. With the Output Enable
(OE) LOW, the contents of the eight flip-flops are avail-
able at the outputs. When the OE is HIGH, the outputs
go to the high impedance state. Operation of the OE
input does not affect the state of the flip-flops.
Truth Table
Inputs
Dn
CP
OE
H
L
L
L
X
L
L
X
X
H
Outputs
On
H
L
Oo
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
Oo = Previous Oo before HIGH-to-LOW of CP
©1999 Fairchild Semiconductor Corporation
74LVT374, 74LVTH374 Rev. 1.5.0
2
www.fairchildsemi.com
 

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