Philips Semiconductors
Octal buffer/line driver with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state
Product specification
74LVC2244A
FEATURES
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range of 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Integrated 30 Ω termination resistors.
DESCRIPTION
The 74LVC2244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In
3-state operation, outputs can handle 5 V. These features
allow the use of these devices as translators in a mixed
3.3/5 V environment.
The 74LVC2244A is an octal non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE. A
HIGH on nOE causes the outputs to assume a
high-impedance OFF-state. Schmitt-trigger action at all
inputs makes the circuit highly tolerant for slower input rise
and fall times. The 74LVC2244A is designed with 30 Ω
series termination resistors in both HIGH and LOW output
stages to reduce line noise.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
tPHL/tPLH
CI
CPD
PARAMETER
propagation delay 1An to 1Yn; 2An to 2Yn
input capacitance
power dissipation capacitance per buffer
CONDITIONS
CL = 50 pF; VCC = 3.3 V
VI = GND to VCC; note 1
Note
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
Σ(CL × VCC2 × fo) = sum of the outputs.
TYPICAL
4.0
5.0
25
UNIT
ns
pF
pF
1999 Sep 30
2