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74LV4051 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74LV4051
NXP
NXP Semiconductors. NXP
74LV4051 Datasheet PDF : 26 Pages
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74LV4051
8-channel analog multiplexer/demultiplexer
Rev. 04 — 10 August 2009
Product data sheet
1. General description
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select
inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to
Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin
and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight
switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are
in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between VCC as a positive limit and VEE as a negative limit. VCC VEE may not
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to
GND (typically ground).
2. Features
I Optimized for low-voltage applications: 1.0 V to 6.0 V
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
I Low ON resistance:
N 145 (typical) at VCC VEE = 2.0 V
N 80 (typical) at VCC VEE = 3.0 V
N 60 (typical) at VCC VEE = 4.5 V
I Logic level translation:
N To enable 3 V logic to communicate with ±3 V analog signals
I Typical ‘break before make’ built in
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Multiple package options
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C
 

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