NXP Semiconductors
74LV138
3-to-8 line decoder/demultiplexer; inverting
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LV138N
−40 °C to +125 °C DIP16
plastic dual in-line package; 16 leads (300 mil)
74LV138D
−40 °C to +125 °C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
74LV138DB
−40 °C to +125 °C SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74LV138PW
−40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74LV138BQ
−40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
Version
SOT38-4
SOT109-1
SOT338-1
SOT403-1
SOT763-1
4. Functional diagram
1
2
3
4 E1
5 E2
6 E3
Fig 1. Logic symbol
A0
Y0 15
A1
Y1 14
A2
Y2 13
Y3 12
Y4 11
Y5 10
Y6
9
Y7
7
mna370
DX
15
0
1
0
14
1
2
G
0
7
2
13
3
12
2
3
11
4
4
&
10
5
5
9
6
6
7
7
(a)
Fig 2. IEC logic symbol
X/Y
15
0
1
1
14
1
2
2
13
2
3
4
12
3
11
4
4
&
10
5
5
9
6
6
EN
7
7
mna371
(b)
74LV138_3
Product data sheet
Rev. 03 — 15 November 2007
© NXP B.V. 2007. All rights reserved.
2 of 17