Quad 2-input NAND Schmitt trigger
Rev. 05 — 2 July 2009
Product data sheet
1. General description
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC132 and 74HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals.
They are capable of transforming slowly changing input signals into sharply deﬁned,
jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The
difference between the positive voltage VT+ and the negative voltage VT− is deﬁned as the
input hysteresis voltage VH.
I Wide operating voltage: 1.0 V to 5.5 V
I Optimized for low voltage applications: 1.0 V to 3.6 V
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 °C
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Multiple package options
I Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C
I Wave and pulse shapers for highly noisy environments
I Astable multivibrators
I Monostable multivibrators