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74LV86N View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
74LV86N
Philips
Philips Electronics Philips
74LV86N Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors
Quad 2-input EXCLUSIVE-OR gate
Product specification
74LV86
FEATURES
Wide Operating voltage: 1.0 to 5.5 V
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
Tamb = 25°C
Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V,
Tamb = 25°C
Output capability: standard
ICC category: SSI
DESCRIPTION
The 74LV86 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT86.
The 74LV86 provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
nA, nB to nY
CL = 15 pF;
VCC = 3.3 V
CI
Input capacitance
CPD
Power dissipation capacitance per gate VI = GND to VCC1
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL × VCC2 × fo) = sum of the outputs.
TYPICAL
11
3.5
30
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIL
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +125°C
74LV86 N
–40°C to +125°C
74LV86 D
–40°C to +125°C
74LV86 DB
–40°C to +125°C
74LV86 PW
NORTH AMERICA
74LV86 N
74LV86 D
74LV86 DB
74LV86PW DH
PKG. DWG. #
SOT27-1
SOT108-1
SOT337-1
SOT402-1
PIN CONFIGURATION
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
SV00481
LOGIC SYMBOL (IEEE/IEC)
1
=1
3
2
4
=1
6
5
9
=1
8
10
12
=1
11
13
SV00479
1998 Apr 20
2
853–1892 19255
 

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