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74LV107N View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
74LV107N Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Dual JK flip-flop with reset; negative-edge trigger
Product specification
74LV107
AC CHARACTERISTICS (Continued)
GND = 0V; tr = tf 2.5ns; CL = 50pF; RL = 1K
SYMBOL
PARAMETER
WAVEFORM
CONDITION
VCC(V)
1.2
tPHL/tPLH
Propagation delay
nR to nQ, nQ
Figures 1, 2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
tW
Clock pulse width
HIGH or LOW
Figure 2
2.7
3.0 to 3.6
4.5 to 5.5
2.0
tW
Reset pulse width
LOW
Figure 2
2.7
3.0 to 3.6
4.5 to 5.5
1.2
trem
Removal time
nR to nCP
Figure 2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
tsu
Set-up time
nJ, nK to CP
Figure 1
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
th
Hold time
nJ, nK to CP
Figure 1
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
fmax
Maximum clock
pulse frequency
Figure 1
2.7
3.0 to 3.6
4.5 to 5.5
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25°C
2. Typical values are measured at VCC = 3.3 V.
–40 to +85 °C
MIN TYP1 MAX
95
32
44
24
33
182
26
22
34
14
25
10
20
82
15
34
14
25
10
20
82
15
35
24
12
18
9
14
72
11
40
26
14
19
10
15
82
12
-10
5
–3
5
–2
5
–22
5
14
40
19
58
24
702
30
–40 to +125 °C
MIN MAX
56
41
33
28
41
30
24
18
41
30
24
29
21
17
14
31
23
18
15
5
5
5
5
12
16
20
24
UNIT
ns
ns
ns
ns
ns
ns
MHz
1998 Apr 20
6
 

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