74HC73U View Datasheet(PDF) - Philips Electronics
Part Name
Description
Manufacturer
74HC73U Datasheet PDF : 21 Pages
| |||
Philips Semiconductors
74HC73
Dual JK flip-flop with reset; negative-edge trigger
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
Symbol Parameter
Conditions
Min Typ
tPHL, tPLH
propagation delay
nCP to nQ
CL = 15 pF; VCC = 5 V
-
-
16
nCP to nQ
-
16
nR to nQ, nQ
-
15
fmax
maximum clock
frequency
CL = 15 pF; VCC = 5 V
-
77
CI
input capacitance
-
3.5
CPD
power dissipation
VI = GND to VCC
[1] -
30
capacitance per flip-flop
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
4. Ordering information
Max Unit
-
-
ns
-
ns
-
ns
-
MHz
-
pF
-
pF
Table 2: Ordering information
Type number Package
Temperature range Name Description
Version
74HC73N
−40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil)
SOT27-1
74HC73D
−40 °C to +125 °C SO14
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HC73DB
−40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width SOT337-1
5.3 mm
74HC73PW
−40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
SOT402-1
9397 750 13815
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2 of 21
|
|
Share Link: 