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74FR573 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74FR573
Fairchild
Fairchild Semiconductor Fairchild
74FR573 Datasheet PDF : 6 Pages
1 2 3 4 5 6
Functional Description
Function Table
The 74FR573 contains eight D-type latches with 3-STATE
output buffers. When the latch enable (LE) input is HIGH,
Inputs
data on the Dn inputs enters the latches. In this condition
the latches are transparent, i.e., a latch output will change
OE
LE
Dn
state each time its D input changes. When LE is LOW the
L
H
H
latches store the information that was present on the D
L
H
L
inputs a setup time preceding the HIGH-to-LOW transition
of LE. The 3-STATE buffers are controlled by the Output
L
L
X
Enable (OE) input. When OE is LOW, the buffers are in the
bi-state mode. When OE is HIGH the buffers are in the high
H
X
X
impedance mode, but this does not interfere with entering
new data into the latches.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
Output
On
H
L
On 1
High Z State
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