74F148SC View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
74F148SC Datasheet PDF : 7 Pages
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Unit Loading/Fan Out
Pin Names
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
I0
I1–I7
EI
EO
GS
A0–A2
Priority Input (Active LOW)
Priority Inputs (Active LOW)
Enable Input (Active LOW)
Enable Output (Active LOW)
Group Signal Output (Active LOW)
Address Outputs (Active LOW)
1.0/1.0
1.0/2.0
1.0/1.0
50/33.3
50/33.3
50/33.3
20 µA/−0.6 mA
20 µA/−1.2 mA
20 µA/−0.6 mA
−1 mA/20 mA
−1 mA/20 mA
−1 mA/20 mA
Functional Description
The F148 8-input priority encoder accepts data from eight
active LOW inputs (I0–I7) and provides a binary represen-
tation on the three active LOW outputs. A priority is
assigned to each input so that when two or more inputs are
simultaneously active, the input with the highest priority is
represented on the output, with input line 7 having the high-
est priority. A HIGH on the Enable Input (EI) will force all
outputs to the inactive (HIGH) state and allow new data to
settle without producing erroneous information at the out-
puts.A Group Signal output (GS) and Enable Output (EO)
are provided along with the three priority data outputs (A2,
A1, A0). GS is active LOW when any input is LOW: this
indicates when any input is active. EO is active LOW when
all inputs are HIGH. Using the Enable Output along with
the Enable Input allows cascading for priority encoding on
any number of input signals. Both EO and GS are in the
inactive HIGH state when the Enable Input is HIGH.
Logic Diagram
Application
16-Input Priority Encoder
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
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