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74F164D View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
74F164D Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors
8-bit serial-in parallel-out shift register
Product specification
74F164
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
CONDITIONS1
LIMITS
MIN TYP2 MAX
UNIT
VOH
High-level output voltage
VCC = MIN, VIL = MAX,
±10%VCC
2.5
V
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VOL
Low-level output voltage
VCC = MIN, VIL = MAX,
VIH = MIN, IOL= MAX
±10%VCC
±5%VCC
0.30 0.50
V
0.30 0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73 –1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0 V
100 µA
IIH
High-level input current
VCC = MAX, VI = 2.7 V
20
µA
IILL
Low-level input current
VCC = MAX, VI = 0.5 V
–0.6 mA
IOS
Short-circuit output current 3
VCC = MAX
–60
–150 mA
ICC
Supply current (total) 4
VCC = MAX
33
55
mA
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5 V, Tamb = 25 °C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter test, IOS tests should be performed last.
4. Measure ICC with the serial inputs grounded, the clock input at 2.4 V, and a momentary ground, then applied to Master Reset, and all outputs
open.
APPLICATION
RESET
CLOCK
DATA
ENABLE
CP
MR
Dsa
74F164
Dsb
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Dsa
H Dsb
CP
MR
74F164
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
D0 D1 D2 D3 D4 D5 D6 D7
The 74F164 can be cascaded to form synchronous shift registers of longer length.
Here, two devices are combined to form a 16-bit shift register.
D8 D9 D10 D11 D12 D13 D14 D15
SF00716
2000 Dec 18
4
 

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