74ALVC16835MTDX View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
74ALVC16835MTDX
Fairchild Semiconductor
74ALVC16835MTDX Datasheet PDF : 7 Pages
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Connection Diagram
Logic Diagram
Pin Descriptions
Pin Names
OE
LE
CLK
I1 - I18
O1 - O18
NC
Description
Output Enable Input (Active LOW)
Latch Enable Input
Clock Input
Data Inputs
3-STATE Outputs
No Connect
Truth Table
Inputs
Outputs
OE
LE
CLK
In
On
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
↑
L
L
L
L
↑
H
H
L
L
H
X
O0 (Note 2)
L
L
L
X
O0 (Note 3)
H = Logic HIGH
L = Logic LOW
X = Don’t Care, but not floating
Z = High Impedance
↑ = LOW-to-HIGH Clock Transition
Note 2: Output level before the indicated steady-state input conditions
were established provided that CLK was HIGH before LE went LOW.
Note 3: Output level before the indicated steady-state input conditions
were established.
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