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74ALVC16821MTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74ALVC16821MTD Datasheet PDF : 6 Pages
1 2 3 4 5 6
Connection Diagram
Logic Diagrams
Truth Tables
Inputs
Outputs
CLK1
OE1
D0–D9
O0–O9
X
H
L
X
L
Z
L

L
H
H
L or H
L
X
O0
Inputs
Outputs
CLK2
OE2
D10–D19 O10–O19
X
H
X
Z

L
L
L

L
H
H
L or H
L
X
O0
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
O0 = Previous O0 before LOW-to-HIGH transition of Clock
= LOW-to-HIGH transition
Functional Description
The 74ALVC16821 contains twenty D-type flip-flops with
3-STATE standard outputs. The device is byte controlled
with each byte functioning identically, but independent of
each other. Control pins can be shorted together to obtain
full 20-bit operation. The following description applies to
each byte. The twenty flip-flops will store the state of their
individual D-type inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CLK) transition.
The 3-STATE standard outputs are controlled by the Out-
put Enable (OEn) input. When OEn is HIGH, the standard
outputs are in the high impedance mode but this does not
interfere with entering new data into the flip-flops.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
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