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74ACT74SC_NL View Datasheet(PDF) - Fairchild Semiconductor

Part Name74ACT74SC_NL Fairchild
Fairchild Semiconductor Fairchild
DescriptionDual D-Type Positive Edge-Triggered Flip-Flop


74ACT74SC_NL Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Connection Diagram
Logic Symbols
Pin Descriptions
Pin Names
D1, D2
CP1, CP2
CD1, CD2
SD1, SD2
Q1, Q1, Q2, Q2
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
IEEE/IEC
Truth Table
(Each Half)
Inputs
Outputs
SD CD CP D
Q
Q
L
H
XXH
L
H
L
XXL
H
L
L
XXH
H
H
 H
HH
L
H
 H
L
L
H
H
H
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
LOW-to-HIGH Clock Transition
Q0 (Q0) Previous Q (Q) before LOW-to-HIGH Transition of Clock
L
X Q0 Q0
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General Description
The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the
positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the  Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Asynchronous Inputs:
   LOW input to SD(Set) sets Q to HIGH level
   LOW input to CD(Clear) sets Q to LOW level
   Clear and Set are independent of clock
   Simultaneous LOW on CDand SDmakes both Q and Q HIGH

Features
■ICCreduced by 50%
■Output source/sink 24 mA
■ACT74 has TTL-compatible inputs

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