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74ACT74SC_NL View Datasheet(PDF) - Fairchild Semiconductor

Part Name74ACT74SC_NL Fairchild
Fairchild Semiconductor Fairchild
DescriptionDual D-Type Positive Edge-Triggered Flip-Flop


74ACT74SC_NL Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
November 1988
Revised February 2005
74AC74 74ACT74
Dual D-Type Positive Edge-Triggered Flip-Flop
General Description
The AC/ACT74 is a dual D-type flip-flop with Asynchronous
Clear and Set inputs and complementary (Q, Q) outputs.
Information at the input is transferred to the outputs on the
positive edge of the clock pulse. Clock triggering occurs at
a voltage level of the clock pulse and is not directly related
to the transition time of the positive-going pulse. After the
Clock Pulse input threshold voltage has been passed, the
Data input is locked out and information present will not be
transferred to the outputs until the next rising edge of the
Clock Pulse input.
Asynchronous Inputs:
LOW input to SD (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes both Q and Q
HIGH
Features
s ICC reduced by 50%
s Output source/sink 24 mA
s ACT74 has TTL-compatible inputs
Ordering Code:
Order Number
Package
Number
Package Description
74AC74SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC74SC_NL
(Note 1)
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC74SJ
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC74MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC74MTCX_NL
(Note 2)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74AC74PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
74ACT74SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT74SC_NL
(Note 1)
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT74SJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT74SJX_NL
(Note 2)
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT74MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT74PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JECED J-STD-020B.
Note 1: “_NL” indicates lead-free product (per JEDEC J-STD-020B).
Note 2: “_NL” indicates lead-free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
FACT¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS009920
www.fairchildsemi.com
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General Description
The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the
positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the  Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Asynchronous Inputs:
   LOW input to SD(Set) sets Q to HIGH level
   LOW input to CD(Clear) sets Q to LOW level
   Clear and Set are independent of clock
   Simultaneous LOW on CDand SDmakes both Q and Q HIGH

Features
■ICCreduced by 50%
■Output source/sink 24 mA
■ACT74 has TTL-compatible inputs

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