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74ACT573MTR View Datasheet(PDF) - STMicroelectronics

Part Name74ACT573MTR ST-Microelectronics
STMicroelectronics ST-Microelectronics
DescriptionOCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS (NON INVERTED)


74ACT573MTR Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
DIM.
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
L
M
S
74ACT573
MIN.
0.10
0.35
0.23
12.60
10.00
7.40
0.50
SO-20 MECHANICAL DATA
mm
TYP.
0.50
1.27
11.43
MAX.
2.65
0.20
2.45
0.49
0.32
MIN.
0.004
0.013
0.009
45 (typ.)
13.00
0.496
10.65
0.393
7.60
0.291
1.27
0.19
0.75
8 (max.)
inch
TYP.
0.020
0.050
0.450
MAX.
0.104
0.007
0.096
0.019
0.012
0.512
0.419
0.299
0.050
0.029
P013L
9/11
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DESCRIPTION
The 74ACT573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q outputs will follow the data input .

■ HIGH SPEED: tPD = 5ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
   ICC = 4µA(MAX.) at TA=25°C
■ COMPATIBLE WITH TTL OUTPUTS
   VIH = 2V (MIN.), VIL = 0.8V (MAX.)
■ 50Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24mA (MIN)
■ BALANCED PROPAGATION DELAYS:
   tPLH = tPHL
■ OPERATING VOLTAGE RANGE:
   VCC (OPR) = 4.5V to 5.5V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573
■ IMPROVED LATCH-UP IMMUNITY

 

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