74ACQ574SJX View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

74ACQ574SJX

Quiet Series™ Octal D-Type Flip-Flop with 3-STATE Outputs

Fairchild Semiconductor 

Logic Symbols

IEEE/IEC

Logic Diagram

Functional Description

The ACQ/ACTQ574 consists of eight edge-triggered

flip-flops with individual D-type inputs and 3-STATE true

outputs. The buffered clock and buffered Output Enable

are common to all flip-flops. The eight flip-flops will store

the state of their individual D-type inputs that meet the

setup and hold time requirements on the LOW-to-HIGH

Clock (CP) transition. With the Output Enable (OE)

LOW, the contents of the eight flip-flops are available at

the outputs. When OE is HIGH, the outputs go to the

high impedance state. Operation of the OE input does

not affect the state of the flip-flops.

Function Table

Inputs

OE CP D

HH L

HHH

H

L

H

H

L

L

L

H

LHL

L HH

Internal

Q

NC

NC

L

H

L

H

NC

NC

Outputs

ON

Function

Z

Hold

Z

Hold

Z

Load

Z

Load

L

Data Available

H

Data Available

NC No Change in

Data

NC No Change in

Data

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

= LOW-to-HIGH Transition

NC = No Change

Please note that this diagram is provided only for the understanding of logic operations and should not be used to

estimate propagation delays.

Figure 1.

©1990 Fairchild Semiconductor Corporation

74ACQ574, 74ACTQ574 Rev. 1.3

2

www.fairchildsemi.com

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