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74AC109SC 查看數據表(PDF) - Fairchild Semiconductor

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74AC109SC Dual JK Positive Edge-Triggered Flip-Flop Fairchild
Fairchild Semiconductor Fairchild
74AC109SC Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Logic Symbols
IEEE/IEC
Truth Table
(each half)
Inputs
Outputs
SD
CD
CP
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H
H
H
H
L
L
L
H
H
 H
H
L
Toggle
H
H
H
H


L
H
H
H
Q0
H
Q0
L
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
= LOW-to-HIGH Transition
X = Immaterial
Q0(Q0) = Previous Q0(Q0) before LOW-to-HIGH Transition of Clock
X
X
Q0
Q0
Logic Diagram (one half shown)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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