MIC708MY View Datasheet(PDF) - Micrel
Part Name
Description
Manufacturer
MIC708MY Datasheet PDF : 7 Pages
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MIC705/06/07/08
Applications Information
Battery Switchover Section
The MIC691/693 monitors the supply voltage applied to the
VCC pin. Whenever VCC falls below the reset threshold voltage
and VBATT, the device enters battery-backup mode. When this
happens, the auxiliary supply on VBATT is routed through a
low impedance PMOS switch to the VOUT pin. The VOUT pin
is capable of sourcing up to 25mA when in the backup mode.
VCC is routed to VOUT through a large PMOS switch during
normal operation (VCC > VBATT) and can source continuous
currents of up to 250mA. VOUT can be used to drive CMOS
RAM. The BATT ON Pin can be used to indicate the status
of battery backup mode or as the base drive for an external
pass transistor when VOUT has to source more than 25mA
in battery-backup mode. VCC is connected to VOUT and the
substrate whenever VCC exceeds the reset threshold. If
VBATT is connected to a voltage source that is greater than
0.6V above VCC, the parasitic diode of the VBATT switch will
conduct from the VBATT to the substrate.
Microprocessor Reset
The /RESET pin is asserted whenever VCC falls below the
reset threshold voltage. The reset pin remains asserted for a
period of 200ms after VCC has risen above the reset thresh-
old voltage. The reset timeout period can also be selected
by the end user, see Table 1. The reset function ensures the
microprocessor is properly reset and powers up into a known
condition after a power failure. /RESET will remain valid with
VCC as low as 1.4V and when auxiliary power is connected
to VBATT (VBATT > 2.0V), the reset pin will remain valid with
VCC from 0V to 5.5V.
Chip Enable Gating
The MIC691/693 also include memory protection circuitry
which inhibits the writing of memory during a power fail con-
dition. During normal operation, chip enable transitions are
gated througha series transmission gate from /CE IN to /CE
OUT. The typical propagation delay through the chip enable
gating circuitry is 2ns. /CE OUT follows /CE IN unless VCC
drops below the reset threshold voltage, at which time /CE OUT
will remain high until VCC returns to a valid level. EEPROMs
can be write protected in a similar manner by connecting the
/CE OUT pin to the store or write input.
Micrel, Inc.
Power Fail Warning
An additional comparator which is independent of the other
functions on the MIC691/693 is provided for early warning
of power failure. An external voltage divider can be used to
compare unregulated DC to an internal 1.25V reference. The
voltage divider ratio on the input of the power-fail comparator
(PFI) can be chosen so as to trip the power fail comparator a
few milliseconds before VCC falls below the maximum reset
threshold voltage. The output of the power-fail comparator
(/PFO) can be used to interrupt the microprocessor when
used in this mode and execute shut-down procedures prior
to power loss. Hysteresis can be added to this comparator
with external resistors, as is commonly done with any com-
parator. When VCC < VBATT - 1.2V (typ.), the power-fail
comparator is turned off and /PFO is pulled low in order to
conserve power.
Unregulated DC
R1
PFI
+
PFO
1.25V
-
R2
Power Fail Comparator
Watchdog Timer
The microprocessor can be monitored by connecting the
WDI pin (watchdog input) to a bus line or an I/O line. If a
transition doesn't occur on the WDI pin with in the watchdog
timeout (Table 1.), the microprocessor is reset. /RESET will
remain asserted for 200ms when this occurs. A minimum
pulse of 100ns or any transition low-to-high or high-to-low
on the WDI pin will reset the watchdog timer. The output of
the watchdog timer (WDO) will remain high, if WDI sees a
valid transition within the watchdog period or if VCC falls
below the reset threshold as the watchdog timer is disabled
when this happens.
MIC705/06/07/08
6
January 2006
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