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P2NC70ZFP View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
P2NC70ZFP N-CHANNEL 700V - 7.3Ohm - 1.4A TO-220/FP/DPAK/IPAK Zener-Protected PowerMESH™ Power MOSFET ST-Microelectronics
STMicroelectronics ST-Microelectronics
P2NC70ZFP Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
STP2NC70Z, STP2NC70ZFP, STD1NC70Z, STD1NC70Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS
Gate- source Voltage
ID
Drain Current (continuos) at TC = 25°C
ID
Drain Current (continuos) at TC = 100°C
IDM (l) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
IGS
Gate-source Current (DC)
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tj
Operating Junction Temperature
Tstg
Storage Temperature
(l) Pulse width limited by safe operating area
(1) ISD 10A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
(*) Limited only by maximum temperature allowed
STP2NC70Z
1.4
0.9
5.6
50
0.4
-
Value
STP2NC70ZFP
700
700
± 25
1.4 (*)
0.9 (*)
5.6 (*)
25
0.2
± 50
2000
3
2500
-65 to 150
-65 to 150
STD1NC70Z
STD1NC70Z-1
1.4
0.9
5.6
45
0.36
-
Unit
V
V
V
A
A
A
W
W/°C
mA
V
V/ns
V
°C
°C
THERMAL DATA
Rthj-case
Rthj-pcb
Rthj-amb
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-pcb Max (for SMD) (#)
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
TO-220
2.5
TO-220FP
5
62.5
300
DPAK
IPAK
2.75
100
100
275
°C/W
°C/W
°C/W
°C
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
1.4
60
Unit
A
mJ
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
αT
Voltage Thermal Coefficient
Note: 3. VBV = αT (25°-T) BVGSO(25°)
(#) When mounted on minimum Footprint
Test Conditions
Igs=± 1mA (Open Drain)
T=25°C Note(3)
Min.
25
Typ.
1.3
Max.
Unit
V
10-4/°C
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage
of external components.
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