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89LPC933 View Datasheet(PDF) - NXP Semiconductors.

Part NameDescriptionManufacturer
89LPC933 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs NXP
NXP Semiconductors. NXP
89LPC933 Datasheet PDF : 77 Pages
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NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
Capture Noise Filter bit. If set, the capture logic needs to see four consecutive samples of
the same value in order to recognize an edge as a capture event. An event counter can be
set to delay a capture by a number of capture events.
8.19.6 PWM operation
PWM operation has two main modes, symmetrical and asymmetrical.
In asymmetrical PWM operation the CCU timer operates in down-counting mode
regardless of the direction control bit.
In symmetrical mode, the timer counts up/down alternately. The main difference from
basic timer operation is the operation of the compare module, which in PWM mode is
used for PWM waveform generation.
As with basic timer operation, when the PWM (compare) pins are connected to the
compare logic, their logic state remains unchanged. However, since bit FCO is used to
hold the halt value, only a compare event can change the state of the pin.
TOR2
compare value
timer value
0x0000
non-inverted
inverted
Fig 10. Asymmetrical PWM, down-counting mode
002aaa893
TOR2
compare value
timer value
0
non-inverted
inverted
Fig 11. Symmetrical PWM
002aaa894
P89LPC933_934_935_936
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
© NXP B.V. 2011. All rights reserved.
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