8-bit microcontroller with accelerated two-clock 80C51 core
8.14.1 Brownout detection
The brownout detect function determines if the power supply voltage drops below a
certain level. The default operation is for a brownout detection to cause a processor reset,
however it may alternatively be configured to generate an interrupt.
Brownout detection may be enabled or disabled in software.
If brownout detection is enabled the brownout condition occurs when VDD falls below the
brownout trip voltage, Vbo (see Table 11 “Static characteristics”), and is negated when VDD
rises above Vbo. If the P89LPC933/934/935/936 device is to operate with a power supply
that can be below 2.7 V, BOE should be left in the unprogrammed state so that the device
can operate at 2.4 V, otherwise continuous brownout reset may prevent the device from
For correct activation of brownout detect, the VDD rise and fall times must be observed.
Please see Table 11 “Static characteristics” for specifications.
8.14.2 Power-on detection
The power-on detect has a function similar to the brownout detect, but is designed to work
as power comes up initially, before the power supply voltage reaches a level where
brownout detect can work. The POF flag in the RSTSRC register is set to indicate an
initial power-up condition. The POF flag will remain set until cleared by software.
8.15 Power reduction modes
The P89LPC933/934/935/936 supports three different power reduction modes. These
modes are Idle mode, Power-down mode, and total Power-down mode.
8.15.1 Idle mode
Idle mode leaves peripherals running in order to allow them to activate the processor
when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle
8.15.2 Power-down mode
The Power-down mode stops the oscillator in order to minimize power consumption. The
P89LPC933/934/935/936 exits Power-down mode via any reset, or certain interrupts. In
Power-down mode, the power supply voltage may be reduced to the RAM keep-alive
voltage VRAM. This retains the RAM contents at the point where Power-down mode was
entered. SFR contents are not guaranteed after VDD has been lowered to VDDR, therefore
it is highly recommended to wake-up the processor via reset in this case. VDD must be
raised to within the operating range before the Power-down mode is exited.
Some chip functions continue to operate and draw power during Power-down mode,
increasing the total power used during power-down. These include: brownout detect,
watchdog timer, Comparators (note that Comparators can be powered-down separately),
and RTC/system timer. The internal RC oscillator is disabled unless both the RC oscillator
has been selected as the system clock and the RTC is enabled.
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
© NXP B.V. 2011. All rights reserved.
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