ADP5051 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP5051

Integrated Power Solution with Quad Buck Regulators, Supervisory Circuit, and I2C Interface

Analog Devices 

ADP5051

Power On/Off Switch Mode

In power-on/off switch mode, when MR is driven low for more

than 4 sec, all channels in the ADP5051 shut down, and the

PCRTL register resets. In this shutdown standby condition, if

MR is driven low for 500 ms again, all channels in the ADP5051

restart according to the individual ENx pin status.

A write-only code, 10101001, in Register 0x10, FORCE_SHUT

overwrites the 4 sec MR timer forcing all enabled channels to

shut down earlier. In addition, this shutdown code command

can be used for a system shutdown command from the I2C host,

even when the MR button is not pressed.

When MR is driven low, the MR_ST bit goes high and shows

the real-time manual reset status after the debounce timer.

Another MR_INT bit is used for the interrupt output on the

manual reset detected event for a possible impending shutdown. To

clear the MR_INT status bit, write a 1 into the status bit. Figure 54

shows the MR timing diagram in power-on/off switch mode.

VINx/ENx

VOUT1 TO

VOUT4

SEQUENCE

START UP

MR SHUTDOWN BY 4s

MR TIMER

START UP ALL POWERS

BY 500ms MR TIMER

MR SHUTDOWN

STATUS

SEQUENCE

START UP

RSTO

tRP

FORCE RSTO

LOW IN SHUTDOWN

STATUS

tRP

MR

(USED AS ON/OFF SWITCH)

MR_ST

(REAL-TIME MR STATUS)

MR_INT

(LATCHED MR STATUS

FOR INTERRUPT)

4s

1s

BLANKING

WRITE 1

TO CLEAR

500ms

NO MR_INT INTERRUPT

IN MR START UP

Figure 54. MR Timing Diagram in Power-On/Off Switch Mode

Data Sheet

To prepare for an automatic startup, clear the MR shutdown

condition by a power reset condition either by pulling all

external ENx pins down, or by pulling an external ENx pin up.

The manual reset on/off switch function allows the ADP5051 to

send out an early shutdown warning signal to the host processor.

After polling the real-time MR_ST signal via the I2C interface,

the host processor can decide and take the actions to prepare for

the possible impending manual shutdown. Usually, the host

processor can make an earlier forced shutdown to overwrite the

4 sec timeout by the forced shutdown code; however, the 4 sec

timeout shutdown allows the system to properly shutdown in a

processor brownout condition.

Rev. B | Page 28 of 55

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