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OPA2836 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
OPA2836 Very-Low-Power, Rail-to-Rail Out, Negative Rail In, Voltage-Feedback Operational Amplifiers TI
Texas Instruments TI
OPA2836 Datasheet PDF : 59 Pages
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OPA836, OPA2836
SLOS712I – JANUARY 2011 – REVISED OCTOBER 2016
www.ti.com
Application Information (continued)
For best CMRR performance, resistors must be matched. Assuming CMRR the resistor tolerance, a 0.1%
tolerance will provide about 60-dB CMRR.
9.1.7 Differential-to-Differential Amplifier
Figure 68 shows a differential amplifier that is used to amplify differential signals. This circuit has high input
impedance and is used in differential line driver applications where the signal source is a high-impedance driver
(for example, a differential DAC) that must drive a line.
If VIN± = VCM + VSIG± , then the output of the amplifier may be calculated according to Equation 6.
æ
VOUT ±
=
VIN±
´ç1
è
+
2RF
RG
ö
÷
ø
+
VCM
(6)
G = 1 + 2RF
The signal gain of the circuit is set by
RG , and VCM passes with unity gain. The amplifier in essence
combines two noninverting amplifiers into one differential amplifier that shares the RG resistor, which makes RG
effectively half its value when calculating the gain. The output signals are in-phase with the input signals.
VIN-
VSIG-
VCM
RG
VCM
VSIG+
VIN+
½ OPA2836
RF
RF
½ OPA2836
VOUT-
GVSIG-
VCM
VCM
GVSIG+
VOUT+
Figure 68. Differential to Differential Amplifier
9.1.8 Gain Setting With OPA836 RUN Integrated Resistors
The OPA836 RUN package option includes integrated gain-setting resistors for smallest possible footprint on a
printed circuit board (2.00 mm × 2.00 mm). By adding circuit traces on the PCB, gains of +1, –1, –1.33, +2,
+2.33, –3, +4, –4, +5, –5.33, +6.33, –7, +8 and inverting attenuations of –0.1429, –0.1875, –0.25, –0.33, –0.75
can be achieved.
Figure 69 shows a simplified view of how the OPA836IRUN integrated gain-setting network is implemented.
Table 3 lists the required pin connections for various noninverting and inverting gains (reference Figure 53 and
Figure 54). Table 4 shows the required pin connections for various attenuations using the inverting-amplifier
architecture (reference Figure 54). Due to ESD protection devices being used on all pins, the absolute maximum
and minimum input-voltage range, VS– – 0.7 V to VS+ + 0.7 V, applies to the gain-setting resistors, so attenuation
of large input voltages requires external resistors to implement.
The gain-setting resistors are laser trimmed to 1% tolerance with nominal values of 1.6 k, 1.2 k, and 400 .
The gain-setting resistors have excellent temperature coefficients, and gain drift is superior to the drift with
external gain-setting resistors. The 500-and 1.5-pF capacitor in parallel with the 1.6-kgain-setting resistor
provide compensation for best stability and pulse response.
34
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