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OPA2836 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
OPA2836 Very-Low-Power, Rail-to-Rail Out, Negative Rail In, Voltage-Feedback Operational Amplifiers TI
Texas Instruments TI
OPA2836 Datasheet PDF : 59 Pages
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OPA836, OPA2836
SLOS712I – JANUARY 2011 – REVISED OCTOBER 2016
www.ti.com
Feature Description (continued)
8.3.2 Output Voltage Range
The OPA836 and OPA2836 devices are rail-to-rail output (RRO) operational amplifiers. Rail-to-rail output
typically means the output voltage swings within a couple hundred millivolts of the supply rails. There are
different ways to specify this: one is with the output still in linear operation and another is with the output
saturated. Saturated output voltages are closer to the power supply rails than linear outputs, but the signal is not
a linear representation of the input. Linear output is a better representation of how well a device performs when
used as a linear amplifier. Saturation and linear operation limits are affected by the output current, where higher
currents lead to more loss in the output transistors.
Figure 11 and Figure 37 show saturated voltage-swing limits versus output load resistance and Figure 12 and
Figure 38 show the output saturation voltage versus load current. Given a light load, the output voltage limits
have nearly constant headroom to the power rails and track the power supply voltages. For example, with a 2-kΩ
load and single 5-V supply, the linear output voltage ranges from 0.15 V to 4.8 V, and ranges from 0.15 V to 2.5
V for a 2.7-V supply. The delta from each power supply rail is the same in either case: 0.15 V and 0.2 V.
With devices like the OPA836 and OPA2836, where the input range is lower than the output range, typically the
input will limit the available signal swing only in noninverting gain of 1. Signal swing in noninverting configurations
in gains > +1 and inverting configurations in any gain is typically limited by the output voltage limits of the
operational amplifier.
8.3.3 Power-Down Operation
The OPA836 and OPA2836 devices include a power-down mode. Under logic control, the amplifiers can switch
from normal operation to a standby current of < 1.5 µA. When the PD pin is connected high, the amplifier is
active. Connecting PD pin low disables the amplifier and places the output in a high-impedance state. When the
amplifier is configured as a unity-gain buffer, the output stage is in a high dc-impedance state. To protect the
input stage of the amplifier, the devices use internal, back-to-back ESD diodes between the inverting and
noninverting input pins. This configuration creates a parallel low-impedance path from the amplifier output to the
noninverting pin when the differential voltage between the pins exceeds a diode voltage drop. When the op amp
is configured in other gains, the feedback (RF) and gain (RG) resistor network forms a parallel load.
The PD pin must be actively driven high or low and must not be left floating. If the power-down mode is not used,
PD must be tied to the positive supply rail.
PD logic states are TTL with reference to the negative supply rail and VS–. When the operational amplifier is
powered from single-supply and ground and driven from logic devices with similar VDD, voltages to the
operational amplifier do not require any special consideration. When the operational amplifier is powered from a
split supply, with VS– below ground, an open-collector type of interface with pullup resistor is more appropriate.
Pullup resistor values must be lower than 100 kΩ. Additionally, the drive logic must be negated due to the
inverting action of an open-collector gate.
8.3.4 Low-Power Applications and the Effects of Resistor Values on Bandwidth
The OPA836 and OPA2836 devices are designed for the nominal value of RF to be 1 kΩ in gains other than +1.
This gives excellent distortion performance, maximum bandwidth, best flatness, and best pulse response, but it
also loads the amplifier. For example; in gain of 2 with RF = RG = 1 kΩ, RG to ground, and VOUT = 4 V, 2 mA of
current will flow through the feedback path to ground. In gain of +1, RG is open and no current will flow to ground.
In low-power applications, it is desirable to reduce the current in the feedback by increasing the gain-setting
resistors values. Using larger value gain resistors has two primary side effects (other than lower power) due to
their interaction with parasitic circuit capacitance:
• Lowers the bandwidth
• Lowers the phase margin
– This causes peaking in the frequency response
– This also causes overshoot and ringing in the pulse response
Figure 55 shows the small-signal frequency response on OPA836EVM for noninverting gain of 2 with RF and RG
equal to 1 kΩ, 10 kΩ, and 100 kΩ. The test was done with RL = 1 kΩ. Due to loading effects of RL, lower RL
values may reduce the peaking, but higher values will not have a significant effect.
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