|Description||True Bipolar Input, 12-/14-Bit, 2-Channel, Simultaneous Sampling SAR ADCs|
|AD7366BRUZ-5 Datasheet PDF : 29 Pages |
AD7366-5/AD7367-5 TO DSP563xx
The connection diagram in Figure 32 shows how the AD7366-5/
AD7367-5 can be connected to the enhanced synchronous
serial interface (ESSI) of the DSP563xx family of DSPs from
Motorola. There are two on-board ESSIs, and each is operated in
synchronous mode (Bit SYN = 1 in the CRB register) with
internally generated word length frame sync for both Tx and Rx
(Bit FSL1 = 0 and Bit FSL0 = 0 in the CRB register).
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 32. Interfacing the AD7366-5/AD7367-5 to the DSP563xx
Normal operation of the ESSI is selected by making MOD = 0 in
the CRB register. Set the word length to 16 by setting Bit WL1 = 1
and Bit WL0 = 0 in the CRA register. The FSP bit in the CRB
register should be set to 1 so that the frame sync is negative.
In Figure 32, the serial clock is taken from the ESSI0 so the SCK0
pin must be set as an output (SCKD = 1) while the SCK1 pin is set
as an input (SCKD = 0). The frame sync signal is taken from SC02
on ESSI0, so SCD2 = 1, while on ESSI1, SCD2 = 0; therefore, SC12
is configured as an input. The VDRIVE pin of the AD7366-5/
AD7367-5 takes the same supply voltage as that of the DSP563xx.
This allows the ADC to operate at a higher voltage than its
serial interface and, therefore, the DSP563xx, if necessary.
Rev. B | Page 26 of 28
|Direct download click here|
|Share Link :|