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AD7366BRUZ-5 View Datasheet(PDF) - Analog Devices

Part NameAD7366BRUZ-5 ADI
Analog Devices ADI
DescriptionTrue Bipolar Input, 12-/14-Bit, 2-Channel, Simultaneous Sampling SAR ADCs
AD7366BRUZ-5 Datasheet PDF : 29 Pages
First Prev 21 22 23 24 25 26 27 28 29
AD7366-5/AD7367-5
MICROPROCESSOR INTERFACING
The serial interface on the AD7366-5/AD7367-5 allows the
parts to be directly connected to a range of different micro-
processors. This section explains how to interface the AD7366-5/
AD7367-5 with some more common microcontrollers and DSP
serial interface protocols.
AD7366-5/AD7367-5 TO ADSP-218x
The ADSP-218x family of DSPs interfaces directly to the
AD7366-5/AD7367-5 with no glue logic required. The VDRIVE
pin of the AD7366-5/AD7367-5 takes the same supply voltage
as that of the ADSP-218x. This allows the ADC to operate at a
higher supply voltage than its serial interface and therefore, the
ADSP-218x, if necessary. The connection diagram in Figure 29
shows both DOUTA and DOUTB of the AD7366-5/AD7367-5
connected to both serial ports of the ADSP-218x. The SPORT0
and SPORT1 control registers should be set up as shown in
Table 11 and Table 12.
AD7366-5/
AD7367-5*
SCLK
CS
DOUTA
DOUTB
BUSY
CNVST
VDRIVE
ADSP-218x*
SCLK0
SCLK1
TFS0
RFS0
RFS1
DR0
DR1
IRQn
FLn
VDD
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 29. Interfacing the AD7366-5/AD7367-5 to the ADSP-218x
Table 11. SPORT0 Control Register Setup
Setting
Description
TFSW = RFSW = 1 Alternate framing.
INVRFS = INVTFS = 1 Active low frame signal.
DTYPE = 00
Right justify data.
SLEN = 1111
16-bit data-word (or can be set to 1101
for 14-bit data-word).
ISCLK = 1
Internal serial clock.
TFSR = RFSR = 1
Frame every word.
IRFS = 0
ITFS = 1
Table 12. SPORT1 Control Register Setup
Setting
Description
TFSW = RFSW = 1 Alternate framing.
INVRFS = INVTFS = 1 Active low frame signal.
DTYPE = 00
Right justify data.
SLEN = 1111
16-bit data-word (or can be set to 1101
for 14-bit data-word).
ISCLK = 0
External serial clock.
TFSR = RFSR = 1
Frame every word.
IRFS = 0
ITFS = 1
The ADSP-218x has the TFS0 and RFS0 of the SPORT0 and the
RFS1 of SPORT1 tied together. TFS0 is set as an output, and both
RFS0 and RFS1 are set as inputs. The DSP operates in alternate
framing mode, and the SPORT control registers are set up as
described in Table 11 and Table 12. The frame synchronization
signal generated on the TFS0 is tied to CS.
The AD7366-5/AD7367-5 BUSY line provides an interrupt to
the ADSP-218x when the conversion is complete. The conversion
results can then be read from the AD7366-5/AD7367-5 using a
read operation. When an interrupt is received on IRQn from the
BUSY signal, a value is transmitted with TFS/DT (ADC control
word). The TFS is used to control the RFS and, therefore, the
reading of data.
Rev. B | Page 24 of 28
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