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AD7366BRUZ-5 View Datasheet(PDF) - Analog Devices

Part NameAD7366BRUZ-5 ADI
Analog Devices ADI
DescriptionTrue Bipolar Input, 12-/14-Bit, 2-Channel, Simultaneous Sampling SAR ADCs
AD7366BRUZ-5 Datasheet PDF : 29 Pages
First Prev 21 22 23 24 25 26 27 28 29
Shutdown mode is intended for use in applications where slow
throughput rates are required. Shutdown mode is suited to
applications where a series of conversions performed at a
relatively high throughput rate are followed by a long period of
inactivity and, thus, shutdown. When the AD7366-5/AD7367-5
are in full power-down, all analog circuitry is powered down.
The falling edge of CNVST initiates the conversion. The BUSY
output subsequently goes high to indicate that the conversion is
in progress. Once the conversion is completed, the BUSY output
returns low. If the CNVST signal is at logic low when BUSY
goes low, the part enters shutdown at the end of the conversion
phase. While the part is in shutdown mode, the digital output
code from the last conversion on each ADC can still be read
from the DOUT pins. To read the DOUT data, CS must be brought
low as described in the Serial Interface section. The DOUT pins
return to three-state once CS is brought back to logic high.
To exit full power-down and to power up the AD7366-5/
AD7367-5, a rising edge of CNVST is required. After the
required power-up time has elapsed, CNVST may be brought
low again to initiate another conversion, as shown in Figure 24
As described in the Shutdown Mode section, the AD7366-5/
AD7367-5 have one power-down mode. This section deals with
the power-up time required when coming out of this mode. It
should be noted that these power-up times apply with the
recommended capacitors in place on the DCAPA and DCAPB pins.
To power up from shutdown, CNVST must be brought high and
remain high for a minimum of 70 μs, as shown in Figure 24.
When power supplies are first applied to the AD7366-5/AD7367-5,
the ADC can power up with CNVST in either the low or high
logic state. Before attempting a valid conversion, CNVST must
be brought high and remain high for the recommended power-
up time of 70 μs. CNVST can then be brought low to initiate a
conversion. With the AD7366-5/AD7367-5, no dummy conversion
is required before valid data can be read from the DOUT pins.
If it is intended to place the part in shutdown mode when the
supplies are first applied, the AD7366-5/AD7367-5 must be
powered up, and a conversion initiated. However, CNVST
should remain in the logic low state, and when the BUSY signal
goes low, the part enters shutdown.
Once supplies are applied to the AD7366-5/AD7367-5, sufficient
time must be allowed for any external reference to power up
and to charge the various reference buffer decoupling capacitors
to their final values.
Figure 24. Autoshutdown Mode for AD7366-5
Rev. B | Page 21 of 28
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