LPC1500 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
LPC1500 Datasheet PDF : 107 Pages
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NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
Table 3.
Symbol
Pin description with fixed-pin functions
Reset Type Description
state[1]
VREFP_ADC
VSSA
VSS
10 13 21
-
17 21 31
-
41, 56, 88,
-
20, 26, 7,
40 27, 39,
55 40,
68,
87
ADC positive reference voltage. The voltage level on
VREFP_ADC must be equal to or lower than the voltage
applied to VDDA. If the ADC is not used, tie VREFP_ADC
to VDD.
Analog ground. VSSAshould typically be the same voltage
as VSS but should be isolated to minimize noise and error.
VSSA should be tied to VSS if the ADC is not used.
Ground.
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled;
F = floating; If the pins are not used, tie floating pins to ground or power to minimize power consumption.
[2] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as analog input, digital section of the pad is disabled and the pin is not 5 V tolerant. This pin includes a 10 ns on/off
glitch filter. By default, the glitch filter is turned on.
[3] This pin is not 5 V tolerant due to special analog functionality. When configured for a digital function, this pin is 3 V tolerant and provides
standard digital I/O functions with configurable internal pull-up and pull-down resistors and hysteresis. When configured for DAC_OUT,
the digital section of the pin is disabled and this pin is a 3 V tolerant analog output. This pin includes a 10 ns on/off glitch filter. By default,
the glitch filter is turned on.
[4] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, and configurable hysteresis. This pin
includes a 10 ns on/off glitch filter. By default, the glitch filter is turned on. This pin is powered in deep power-down mode and can wake
up the part. The wake-up pin function can be disabled and the pin can be used for other purposes, if the RTC is enabled for waking up
the part from Deep power-down mode.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
[6] 5 V tolerant pad. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode.
[7] I2C-bus pin compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode Plus. The pin requires an
external pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines.
Open-drain configuration applies to all functions on this pin.
[8] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis; includes
high-current output driver.
[9] Special analog pin.
[10] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[11] When the main oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
LPC15XX
Product data sheet
Table 4. Movable functions
Function name
Type Description
U0_TXD
O
Transmitter output for USART0.
U0_RXD
I
Receiver input for USART0.
U0_RTS
O
Request To Send output for USART0.
U0_CTS
I
Clear To Send input for USART0.
U0_SCLK
I/O
Serial clock input/output for USART0 in synchronous mode.
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 29 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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