FM24C256N View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

FM24C256N

256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect

Fairchild Semiconductor 

Write Cycle Timing

ACKNOWLEDGE

ACK (acknowledge) is a software convention used to indicate

successful data transfers. The transmitting device, either master or

slave, will release the bus after transmitting eight bits. During the ninth

clock cycle the receiver will pull the SDA line LOW to acknowledge

that it received the eight bits of data. Refer to Figure 3.

The FM24C256xxx device will always respond with an acknowl-

edge after recognition of a start condition and its slave address. If

Write Cycle Timing:

both the device and a WRITE operation have been selected, the

FM24C256xxx will respond with an acknowledge after the receipt

of each subsequent eight bit word.

In the READ mode the FM24C256xxx slave will transmit eight bits

of data, release the SDA line and monitor the line for an acknowl-

edge. If an acknowledge is detected and no stop condition is

generated by the master, the slave will continue to transmit data.

If an acknowledge is not detected, the slave will terminate further

data transmissions and await the stop condition to return to the

standby power mode.

SCL

SDA

8th BIT

WORD n

ACK

Data Validity (Figure 1)

tWR

STOP

START

CONDITION

CONDITION

DS800023-4

SCL

DATA STABLE DATA

CHANGE

SDA

Definition of Start and Stop (Figure 2)

SCL

SDA

START CONDITION

Acknowledge Response from Receiver (Figure 3)

SCL FROM

MASTER

1

Data Output

from Transmitter

Data Output

from Receiver

START

7

FM24C256 rev. B.3

DS800023-5

STOP CONDITION

8

9

DS800023-6

ACKNOWLEDGE

DS800023-7

www.fairchildsemi.com

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