CS48500 Data Sheet
32-bit Audio Decoder DSP Family
5.9 Switching Characteristics — Serial Control Port - SPI Slave Mode
.
Parameter
Symbol
Min
Typical
Max
Units
SCP_CLK frequency1
fspisck
-
25
MHz
SCP_CS# falling to SCP_CLK rising
tspicss
24
-
ns
SCP_CLK low time
tspickl
20
-
ns
SCP_CLK high time
tspickh
20
-
ns
Setup time SCP_MOSI input
tspidsu
5
-
ns
Hold time SCP_MOSI input
tspidh
5
-
ns
SCP_CLK low to SCP_MISO output valid
tspidov
-
8
ns
SCP_CLK falling to SCP_IRQ# rising
tspiirqh
-
20
ns
T SCP_CS# rising to SCP_IRQ# falling
tspiirql
0
ns
F SCP_CLK low to SCP_CS# rising
tspicsh
24
-
ns
SCP_CS# rising to SCP_MISO output high-Z tspicsdz
-
20
ns
A SCP_CLK rising to SCP_BSY# falling
tspicbsyl
-
3*DCLKP+20
ns
1.The specification fspisck indicates the maximum speed of the hardware. The system designer should be
R aware that the actual maximum speed of the communication port may be limited by the firmware applica-
tion. Flow control using the SCP_BSY# pin should be implemented to prevent overflow of the input data
D buffer.
L I SCP_CS#
TIA PH SCP_CLK
EN EL SCP_MOSI
ID D SCP_MISO
NF SCP_IRQ#
CO SCP_BSY#
tspicss
tspickl
0
1
2
6
7
0
5
6
7
tspicsh
fspisck
tspickh
A6
tspidsu
A5
tspidh
A0 R/W MSB
tspidov
MSB
LSB
tspiirqh
LSB
tspicsdz
tspiirql
tspibsyl
Figure 3. Serial Control Port - SPI Slave Mode Timing
16
©Copyright 2006 Cirrus Logic, Inc.
DS734A3
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