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VDS8608A8A View Datasheet(PDF) - A-Data Technology

Part Name
Description
Manufacturer
VDS8608A8A
A-Data
A-Data Technology A-Data
VDS8608A8A Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
V-Data
Synchronous DRAM
VDS8608A8A
8M x 8 Bit x 4 Banks
General Description
The VDS8608A8A are four-bank Synchronous
DRAMs organized as 8,388,608 words x 8 bits x 4
banks.
Synchronous design allows precise cycle control
with the use of system clock I/O transactions are
possible on every clock cycle.
Range of operating frequencies, programmable
burst length and programmable latencies allow the
same device to be useful for a variety of high
bandwidth high performance memory system
applications
Features
JEDEC standard LVTTL 3.3V power supply
MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,4,8,& full page)
-Burst Type (sequential & Interleave)
4 banks operation
All inputs are sampled at the positive edge of
the system clock
Burst Read single write operation
Auto & Self refresh
DQM for masking
8192 Refresh Cycles
Package:54-pins 400 mil TSOP-Type II
Ordering Information.
Part No.
Frequency
Interface
Package
VDS8608A8A-75
133Mhz-333
LVTTL
400mil 54pin TSOPII
VDS8608A8A-75A
Pin Assignment
133Mhz-222
LVTTL
400mil 54pin TSOPII
VCC
1
DQ0
2
VCCQ
3
NC
4
DQ1
5
VSSQ
6
NC
7
DQ2
8
VCCQ
9
NC
10
DQ3
11
VSSQ
12
NC
13
VCC
14
NC
15
/WE
16
/CAS
17
/RAS
18
/CS
19
BS0
20
BS1
21
A10/AP
22
A0
23
A1
24
A2
25
A3
26
VCC
27
54
Vss
53
DQ7
52
VssQ
51
NC
50
DQ6
49
VCCQ
48
NC
47
DQ5
46
VSSQ
45
NC
44
DQ4
43
VCCQ
42
NC
41
VSS
40
NC
39
DQM
38
CLK
37
CKE
36
A12
35
A11
34
A9
33
A8
32
A7
31
A6
30
A5
29
A4
28
VSS
54-pin plastic TSOP II 400 mil
Rev 1.0 December, 2001
1
 

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