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NX25F011B View Datasheet(PDF) - Unspecified

Part NameDescriptionManufacturer
NX25F011B 1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE ETC1
Unspecified 
NX25F011B Datasheet PDF : 37 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NX25F011B
NX25F021B
NX25F041B
Using the SRAM Independent of Flash Memory
The SRAM can be used independently of Flash memory
operations for lookup tables, variable storage, or scratch
pad purposes. If the Flash memory needs to be written to
while SRAM is being used for a different purpose, the
contents can be temporarily stored to a sector and then
transferred back again when needed. The SRAM can be
especially useful for RAM-limited microcontroller-based
systems, eliminating the need for external SRAM and
freeing pins for other purposes. It can also make it possible
to use small pin-count microcontrollers, since only a few
pins are needed for the interface instead of the 20-40 pins
required for parallel bus-oriented Flash devices.
Write Protection
The NX25F011B, NX25F021B, and NX25F041B provide ad-
vanced software and hardware write protection
features. Software-controlled write protection of the entire
array is handled using the Write Enable and Write Disable
commands. Hardware write protection is possible using the
Write Protect pin (WP). Write-protecting a portion of Flash
memory is accommodated by programming a write protect
range in the configuration register. For applications
needing a portion of the memory to be permanently
write-protected or a fixed configuration register value, a
onetime programmable write protection feature is supported.
Contact NexFlash for further information.
Configuration Register
The Configuration Register stores the current configuration
of the HOLD-R/B pin, read clock edge and write protect
range (Figure 7). The configuration register is accessed
using the Write and Read Configuration Register
commands. The non-volatile configuration register will
maintain its setting even when power is removed.
To avoid unnecessary programming of the configuration
register, and to save time during power-up, the configuration
register should be read upon power-up and compared to the
intended setting before sending a Write Configuration
Register command (Figure 6).
1
System Power-up
Read Device Information Sector,
2
Verify Device Density and Type
3
Read Configuration Register
Verify bits are Set as Needed
4
Configuration
Yes
Setting is Correct?
5
No
Write Configuration Register
to Correct Setting
6
7
Application Routines
8
9 Figure 6. Flow Chart for Checking the Configuration
Register upon Power-up
10
11
12
NexFlash Technologies, Inc.
9
PRELIMINARY NXSF016F-1201
12/12/01 ©
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