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NX25F011B View Datasheet(PDF) - Unspecified

Part NameDescriptionManufacturer
NX25F011B 1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE ETC1
Unspecified 
NX25F011B Datasheet PDF : 37 Pages
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NX25F011B
NX25F021B
NX25F041B
Write Non-Volatile Configuration
Register (8AH)
The Write Configuration Register command provides ac-
cess to the configuration register which stores the current
configuration of the HOLD-R/B pin, read-data clock edge,
write protect range, and alternate oscillator frequency. The
configuration register is non-volatile. Once set using the
Write Configuration Register command, the contents will
maintain even when power is removed. Because the
registers state is stored in non-volatile memory, there is
a finite endurance limit to the number of times it can be
written to. To limit the number of writes, it is recommended
that before writing to the configuration register it should
first be read from using the Read Configuration Register
command. If no change is required, the Write Configuration
Register command can be skipped. This process will help
extend the endurance of the configuration register bits and
eliminate additional programming busytime.
The Write Configuration Register command sequence
starts with the command byte (8AH) followed by a 16-bit
field that specifies configuration register bit settings.
Although the field is 16-bits long, only bits CF[7:0] are
used. All other upper bits are reserved and must be
clocked using 0 for data. After an additional 16 control
clocks using 0 for data, the command can be completed
by asserting CS high. The device will become busy for a
short time (tWP) while the non-volatile memory cells of the
configuration register are programmed.
Write
Configuration
Register Configuration
Command
Bits*
16 Clocks
SI
8AH
CF[15:0]
0000H
Program Time
(tWP)
SO
*The CF Register only uses bits [7:0]
Read Status Register (84H)
The Read Status Register command provides access to
the status register and its status flags for Ready/Busy
(R/B), SRAM and program buffer transfer operations (TX),
Write Enable/Disable (WE), and Compare Not Equal (CNE)
(Figure 8). An 8-bit Status field ST[7:0] provides the
contents of the Status Register.
Read Status
Register
Command
SI
84H
SO
ST[7:0]
Read Status Register Bits
22
NexFlash Technologies, Inc.
PRELIMINARY NXSF016F-1201
12/12/01 ©
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