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MX29F400BTA-12 查看數據表(PDF) - Macronix International

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MX29F400BTA-12 4M-BIT [512Kx8/256Kx16] CMOS FLASH MEMORY MCNIX
Macronix International MCNIX
MX29F400BTA-12 Datasheet PDF : 44 Pages
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MX29F400T/B
AUTOMATIC CHIP ERASE TIMING WAVEFORM
All data in chip are erased. External erase verification is
not required because data is erased automatically by
internal control circuit. Erasure completion can be veri-
fied by DATA polling and toggle bit checking after auto-
matic erase starts. Device outputs 0 during erasure
and 1 after erasure on Q7.(Q6 is for toggle bit; see toggle
bit, DATA polling, timing waveform)
AUTOMATIC CHIP ERASE TIMING WAVEFORM (WORD MODE)
Vcc 5V
A11~A17
A0~A10
WE
CE
OE
Q0,Q1,
Q4(Note 1)
Q7
555H
2AAH
555H
555H
2AAH
555H
tAS
tCWC
tAH
tCEPH1
tAETC
tCEP
tDS tDH
Command In
Command In
Command In
Command In
Command In
Command #AAH
(Q0~Q7)
Command In
Command #55H
Command In
Command #80H
Command In
Command #AAH
Command In
Command In
DATA polling
Command In
Command #55H
Command In
Command #10H
Notes:
(1). Q6:Toggle bit, Q5:Timing-limit bit, Q3: Time-out bit, Q2: Toggle bit
P/N:PM0439
REV. 1.6, NOV. 12, 2001
25
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