80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
All these devices can be programmed by using a modified Improved
Quick-Pulse Programming™ algorithm. It differs from older methods
in the value used for VPP (programming supply voltage) and in the
width and number of the ALE/PROG pulses.
The family contains two signature bytes that can be read and used
by an EPROM programming system to identify the device. The
signature bytes identify the device as being manufactured by
Table 8 shows the logic levels for reading the signature byte, and for
programming the program memory, the encryption table, and the
security bits. The circuit configuration and waveforms for quick-pulse
programming are shown in Figures 26 and 27. Figure 28 shows the
circuit configuration for normal program memory verification.
The setup for microcontroller quick-pulse programming is shown in
Figure 26. Note that the device is running with a 4 to 6MHz
oscillator. The reason the oscillator needs to be running is that the
device is executing internal address and program data transfers.
The address of the EPROM location to be programmed is applied to
ports 1 and 2, as shown in Figure 26. The code byte to be
programmed into that location is applied to port 0. RST, PSEN and
pins of ports 2 and 3 specified in Table 8 are held at the ‘Program
Code Data’ levels indicated in Table 8. The ALE/PROG is pulsed
low 5 times as shown in Figure 27.
To program the encryption table, repeat the 5 pulse programming
sequence for addresses 0 through 1FH, using the ‘Pgm Encryption
Table’ levels. Do not forget that after the encryption table is
programmed, verification cycles will produce only encrypted data.
To program the security bits, repeat the 5 pulse programming
sequence using the ‘Pgm Security Bit’ levels. After one security bit is
programmed, further programming of the code memory and
encryption table is disabled. However, the other security bits can still
Note that the EA/VPP pin must not be allowed to go above the
maximum specified VPP level for any amount of time. Even a narrow
glitch above that voltage can cause permanent damage to the
device. The VPP source should be well regulated and free of glitches
If security bits 2 and 3 have not been programmed, the on-chip
program memory can be read out for program verification. The
address of the program memory locations to be read is applied to
ports 1 and 2 as shown in Figure 28. The other pins are held at the
‘Verify Code Data’ levels indicated in Table 8. The contents of the
address location will be emitted on port 0. External pull-ups are
required on port 0 for this operation.
If the 64 byte encryption table has been programmed, the data
presented at port 0 will be the exclusive NOR of the program byte
with one of the encryption bytes. The user will have to know the
encryption table contents in order to correctly decode the verification
data. The encryption table itself cannot be read out.
Reading the Signature Bytes
The signature bytes are read by the same procedure as a normal
verification of locations 030H and 031H, except that P3.6 and P3.7
need to be pulled to a logic low. The values are:
(030H) = 15H indicates manufactured by Philips
(031H) = 92H indicates 87C51
Any algorithm in agreement with the conditions listed in Table 8, and
which satisfies the timing specifications, is suitable.
Erasure of the EPROM begins to occur when the chip is exposed to
light with wavelengths shorter than approximately 4,000 angstroms.
Since sunlight and fluorescent lighting have wavelengths in this
range, exposure to these light sources over an extended time (about
1 week in sunlight, or 3 years in room level fluorescent lighting)
could cause inadvertent erasure. For this and secondary effects,
it is recommended that an opaque label be placed over the
window. For elevated temperature or environments where solvents
are being used, apply Kapton tape Fluorglas part number 2345–5, or
The recommended erasure procedure is exposure to ultraviolet light
(at 2537 angstroms) to an integrated dose of at least 15W-s/cm2.
Exposing the EPROM to an ultraviolet lamp of 12,000µW/cm2 rating
for 20 to 39 minutes, at a distance of about 1 inch, should be
Erasure leaves the array in an all 1s state.
With none of the security bits programmed the code in the program
memory can be verified. If the encryption table is programmed, the
code will be encrypted when verified. When only security bit 1 (see
Table 9) is programmed, MOVC instructions executed from external
program memory are disabled from fetching code bytes from the
internal memory, EA is latched on Reset and all further programming
of the EPROM is disabled. When security bits 1 and 2 are
programmed, in addition to the above, verify mode is disabled.
When all three security bits are programmed, all of the conditions
above apply and all external program memory execution is disabled.
64 bytes of encryption array are initially unprogrammed (all 1s).
™Trademark phrase of Intel Corporation.
2000 Jan 20