M27V160-100K1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M27V160-100K1 Datasheet PDF : 25 Pages
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M27V160
Device description
E input. When in the standby mode, the outputs are in a high impedance state, independent
of the G input.
2.3
Two-line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
● the lowest possible memory power dissipation,
● complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
2.4
System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the supplies to the devices. The supply current ICC has three segments of
importance to the system designer: the standby current, the active current and the transient
peaks that are produced by the falling and rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device outputs.
The associated transient voltage peaks can be suppressed by complying with the two line
output control and by properly selected decoupling capacitors. It is recommended that a
0.1µF ceramic capacitor is used on every device between VCC and VSS. This should be a
high frequency type of low inherent inductance and should be placed as close as possible to
the device. In addition, a 4.7µF electrolytic capacitor should be used between VCC and VSS
for every eight devices. This capacitor should be mounted near the power supply connection
point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive
effects of PCB traces.
2.5
Programming
The M27V160 has been designed to be fully compatible with the M27C160. As a result the
M27V160 can be programmed as the M27C160 on the same programming equipments
applying 12.75V on VPP and 6.25V on VCC by the use of the same PRESTO III algorithm.
When delivered (and after each erasure for UV EPROM), all bits of the M27V160 are in the
'1' state. Data is introduced by selectively programming '0's to the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27V160 is in the programming mode when Vpp input is at 12.5V, G is at VIH and E is
pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output
pins. The levels required for the address and data inputs are TTL. VCC is specified to be
6.25V ± 0.25V.
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