M48Z02
M48Z12
5 V, 16 Kbit (2 Kb x 8) ZEROPOWER® SRAM
Features
â– Integrated, ultra low power SRAM and power-
fail control circuit
â– Unlimited WRITE cycles
â– READ cycle time equals WRITE cycle time
â– Automatic power-fail chip deselect and WRITE
protection
â– WRITE protect voltages
(VPFD = power-fail deselect voltage):
– M48Z02: VCC= 4.75 to 5.5 V;
4.5 V ≤ VPFD ≤ 4.75 V
– M48Z12: VCC= 4.5 to 5.5 V;
4.2 V ≤ VPFD ≤ 4.5 V
â– Self-contained battery in the CAPHATâ„¢ DIP
package
â– Pin and function compatible with JEDEC
standard 2 K x 8 SRAMs
â– RoHS compliant
– Lead-free second level interconnect
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PCDIP24
Battery CAPHATâ„¢
June 2011
Doc ID 2420 Rev 9
1/22
www.st.com
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