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IC61LV12816-12T View Datasheet(PDF) - Integrated Circuit Solution Inc

Part Name
Description
Manufacturer
IC61LV12816-12T
ICSI
Integrated Circuit Solution Inc ICSI
IC61LV12816-12T Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IC61LV12816
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter
tWC Write Cycle Time
tSCE CE to Write End
tAW Address Setup Time
to Write End
tHA Address Hold from Write End
tSA Address Setup Time
tPWB LB, UB Valid to End of Write
tPWE(4) WE Pulse Width
tSD Data Setup to Write End
tHD Data Hold from Write End
tHZWE(2) WE LOW to High-Z Output
tLZWE(2) WE HIGH to Low-Z Output
-8
Min. Max.
8—
7—
7—
0—
0—
7—
7—
4.5 —
0—
—3
0—
-10
Min. Max.
10 —
8—
8—
0—
0—
8—
8—
5—
0—
—4
0—
-12
Min. Max.
12 —
8—
8—
0—
0—
9—
9—
6—
0—
—5
0—
-15
Min. Max. Unit
15 — ns
10 — ns
10 — ns
0 — ns
0 — ns
10 — ns
10 — ns
7 — ns
0 — ns
— 6 ns
0 — ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
4.Tested with OE Hith.
8
Integrated Circuit Solution, Inc.
AHSR024-0B 04/23/2004
 

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