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MAQ3693NB View Datasheet(PDF) - Dynex Semiconductor

Part NameDescriptionManufacturer
MAQ3693NB 1553B Bus Controller/Remote Terminal Dynex
Dynex Semiconductor Dynex
MAQ3693NB Datasheet PDF : 41 Pages
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MA3690/1/3
Word Count Low
This bit shall be reset to logic zero by the reception of any
valid command word with the exception of TSW, TLC and
TBW.
This bit shall be set to logic one if fewer valid data words
are received than specified by the preceding command word.
Word Count High
This bit shall be rest to logic zero by the reception of any
valid command word with the exception of TSW, TLC and
TBW.
This bit shall be set to logic one if the received message is
longer than stipulated by the preceeding command word.
ADEN
RTAD0
EN
B0
RTAD1
B1
RTAD2
B2
RTAD3
B3
BUFFER
RTAD4
B4
RTADPAR
B5
BCSTEN0
B6
BCSTEN1
B7
Illegal Broadcast
This bit shall be reset to logic zero by the reception of any
valid command word with the exception of TSW, TLC and
TBW.
This bit shall be set to logic one if a valid command word
which by definition requires terminal transmission is received
with the broadcast address.
Bus 0 Shutdown
Note: RTAD0, RTAD1, RTAD2, RTAD3, RTAD4 define the RT
address RTADPAR odd parity with the address bits
BCSTEN0 - Broadcast enable for BUS0
BCSTEN1 - Broadcast enable for BUS1
Figure 4: Subsystem RT Address Buffer
This bit shall be set to logic one if bus 0 is shutdown.
Bus 1 Shutdown
This bit shall be set to logic one if bus 1 is shutdown.
Terminal Flag Inhibited
This bit shall be set to logic one if the internal terminal flag
inhibit is set.
Transmitter Timeout on Bus 0
This bit shall be set to logic one if a transmitter timeout has
occured on bus 0.
Transmitter Timeout on Bus 1
This bit shall be set to logic one if a transmitter timeout has
occured on bus 1.
12/41
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