TMXF84622 View Datasheet(PDF) - Agere -> LSI Corporation
Part Name
Description
Manufacturer
TMXF84622 Datasheet PDF : 62 Pages
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Advance Data Sheet, Rev. 2
July 2001
TMXF84622 155 Mbits/s/622 Mbits/s Interface
SONET/SDH x84/x63 Ultramapper
1 Features
PDH Interfaces
s Versatile IC supports 622 Mbits/s/155 Mbits/s
SONET/SDH interface solutions for T3/E3, DS2,
T1/E1/J1, and DS0/E0/J0 applications.
s Implementation supports both linear (1 + 1, unpro-
tected) and ring (UPSR) network topologies.
s Provides full termination of up to 63 (21 x 3) E1,
84 (28 x 3) T1, or 84 (28 x 3) J1.
s Low 3.3 V power supply.
s –40 °C to +85 °C industrial temperature range.
s 700-pin ball grid array (PBGA) package.
s Complies with Telecordia Technologies*, ITU,
ANSI †, ETSI, and Japanese TTC standards: GR-
253-CORE, GR-499, (ATT) TR-62411, ITU-T
G.707, G.704, G.706, G.783, G.962, G.964,
G.965, Q.542, T1.105, JT-G704, JT-G706, JT-
G707, JT-I431-a, ETS 300 417-1-1, ETS 300 011,
T1.107, T1.404.
s 6 DS3, 21 x DS2, or 6 E3, 12 x E2.
s Twenty-one framed or unframed DS1 or E1 inter-
faces.
s Two additional protection channels for DS2/DS1/
E1.
STS/STM Pointer Interpreter
s Interprets STS/AU/TU-3 pointers.
s Synchronizes 8 kHz frame and 2 kHz superframe
to system-shelf-timing reference by setting the
transmit STS-3/STM-1 pointers to a fixed value
of 522 with an adjustable frame location.
s Monitors/terminates SPE path overhead.
STS3 Serial Interconnect
SONET/SDH Interface
s Termination of a single 622 Mbits/s STS-12/STM-4
or single 155 Mbits/s STS-3/STM-1.
s Built-in clock and data recovery circuit at
622 Mbits/s STS-12/STM-4 interface.
s Supports overhead processing for all transport and
path overhead bytes.
s Optional insertion and extraction of overhead bytes
via a serial transport overhead access channel.
Configurable as dedicated DCC channels.
s Software controlled linear 1 + 1 protection via dedi-
cated interface to protection card.
s Full path termination and SPE extraction/insertion.
s SONET/SDH compliant condition and alarm
reporting.
s Built-in diagnostic loopback modes.
s 8 kHz line frame synchronizing output.
s Serial interface to mate devices.
s 4 Ultramapper devices, 3 configured as mate
devices, provide full termination of an STS-12/
STM-4. A 4 chip solution to terminate
336 DS1s/J1s or 252 E1s.
VT Termination/Generation 84/63 (3x28/21)
s Supports TIM-V generation and termination for all
84/63 (3x28/21) VT/TU signals.
s Synchronizes VT/TU SPE to system-shelf-timing
reference by setting the transmit VT/TU pointers to
fixed values for asynchronous mapping or by
dynamically changing the transmit VT/TU pointers
for byte synchronous mapping.
s Fixed pointer generation in transmit side for asyn-
chronous mapping.
s Dynamic pointer generation in transmit side for
byte-synchronous mapping.
* Telecordia Technologies is a trademark of Telecordia Technolo-
gies Inc.
† ANSI is a registered trademark of American National Standards
Institute, Inc.
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