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ADC0831 Просмотр технического описания (PDF) - Texas Instruments

Номер в каталогеADC0831 TI
Texas Instruments TI
Компоненты Описание8-Bit Serial I/O A/D Converters with Multiplexer Options
ADC0831 Datasheet PDF : 41 Pages
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ADC0831-N, ADC0832-N, ADC0834-N, ADC0838-N
The Analog Inputs
The most important feature of these converters is that they can be located right at the analog signal source and
through just a few wires can communicate with a controlling processor with a highly noise immune serial bit
stream. This in itself greatly minimizes circuitry to maintain analog signal accuracy which otherwise is most
susceptible to noise pickup. However, a few words are in order with regard to the analog inputs should the input
be noisy to begin with or possibly riding on a large common-mode voltage.
The differential input of these converters actually reduces the effects of common-mode input noise, a signal
common to both selected “+” and “” inputs for a conversion (60 Hz is most typical). The time interval between
sampling the “+” input and then the “” input is ½ of a clock period. The change in the common-mode voltage
during this short time interval can cause conversion errors. For a sinusoidal common-mode signal this error is:
• fCM is the frequency of the common-mode signal
• VPEAK is its peak voltage value
• fCLK, is the A/D clock frequency
For a 60 Hz common-mode signal to generate a ¼ LSB error (5 mV) with the converter running at 250 kHz, its
peak value would have to be 6.63V which would be larger than allowed as it exceeds the maximum analog input
Due to the sampling nature of the analog inputs short spikes of current enter the “+” input and exit the “” input at
the clock edges during the actual conversion. These currents decay rapidly and do not cause errors as the
internal comparator is strobed at the end of a clock period. Bypass capacitors at the inputs will average these
currents and cause an effective DC current to flow through the output resistance of the analog signal source.
Bypass capacitors should not be used if the source resistance is greater than 1 kΩ.
This source resistance limitation is important with regard to the DC leakage currents of input multiplexer as well.
The worst-case leakage current of ±1 μA over temperature will create a 1 mV input error with a 1 kΩ source
resistance. An op amp RC active low pass filter can provide both impedance buffering and noise filtering should
a high impedance signal source be required.
Optional Adjustments
Zero Error
The zero of the A/D does not require adjustment. If the minimum analog input voltage value, VIN(MIN), is not
ground a zero offset can be done. The converter can be made to output 0000 0000 digital code for this minimum
input voltage by biasing any VIN () input at this VIN(MIN) value. This utilizes the differential mode operation of the
The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be
measured by grounding the VIN() input and applying a small magnitude positive voltage to the VIN(+) input. Zero
error is the difference between the actual DC input voltage which is necessary to just cause an output digital
code transition from 0000 0000 to 0000 0001 and the ideal ½ LSB value (½ LSB=9.8 mV for VREF=5.000 VDC).
The full-scale adjustment can be made by applying a differential input voltage which is 1 ½ LSB down from the
desired analog full-scale voltage range and then adjusting the magnitude of the VREF input (or VCC for the
ADC0832) for a digital output code which is just changing from 1111 1110 to 1111 1111.
Copyright © 1999–2013, Texas Instruments Incorporated
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